Daniel Andrasz
I'm Daniel Andrasz, a full-time Materials Science & Engineering student at UIUC focusing on semiconductor microfabrication, thin-film processing, and device metrology.
WAFER MAP INSPECTOR // 200mm
Interactive parametric yield & die metrology
TELEMETRY PASS
LAYER: POLY GATE
DIE COORD: [X: 04, Y: 05]
PARAMETRIC Rs: 24.2 Ω/sq
V_TH (NMOS): 0.412 V
OXIDE T_OX: 18.4 nm
LAYER YIELD // SUMMARY
Yield: 94.6% Defects: 4 dies
TECH STACK
Semiconductor Fabrication
Photolithography (Mask/Maskless) RIE / Plasma Etching HF / BOE Wet Etching E-beam Deposition Thermal Oxidation Thin-Film Deposition Thermocompression Bonding Tube Furnace Annealing Spin Coating Lift-off Thermal Diffusion
Characterization & Metrology
I-V / C-V Profiling Parameter Extraction 4-Point Probe Probe Stations Interface Defect Analysis Yield Analysis DFM
Data & Statistical Analysis
JMP Snowflake Python (NumPy, SciPy, Pandas, Matplotlib)
Design, Simulation & Programming
SystemVerilog C/C++ Sentaurus TCAD Xilinx Vivado ModelSim SolidWorks LaTeX